\hypertarget{group___mmal_component_wrapper}{}\section{utility}
\label{group___mmal_component_wrapper}\index{utility@{utility}}
\subsection*{Classes}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}}
\end{DoxyCompactItemize}
\subsection*{Typedefs}
\begin{DoxyCompactItemize}
\item 
typedef struct \mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_gad6b7cb1f4564f8951d22afbac6faae40}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}}
\item 
typedef void($\ast$ \mbox{\hyperlink{group___mmal_component_wrapper_gab3104be6013b2cdfadf7da4fe2affab3}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+C\+A\+L\+L\+B\+A\+C\+K\+\_\+T}}) (\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$wrapper)
\end{DoxyCompactItemize}
\subsection*{Functions}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_gab454ffe44bbd981c84327a134c17b0b2}{mmal\+\_\+wrapper\+\_\+create}} (\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$$\ast$wrapper, const char $\ast$name)
\item 
\mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_ga1eea5ae6cdbb178ae318700919e59c5a}{mmal\+\_\+wrapper\+\_\+port\+\_\+enable}} (\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$port, uint32\+\_\+t flags)
\item 
\mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_ga5b03d5dd0a18cd4cd6142517156a2887}{mmal\+\_\+wrapper\+\_\+port\+\_\+disable}} (\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$port)
\item 
\mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_ga97da12059ceca54c183c4183e1ba6534}{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+empty}} (\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$port, \mbox{\hyperlink{struct_m_m_a_l___b_u_f_f_e_r___h_e_a_d_e_r___t}{M\+M\+A\+L\+\_\+\+B\+U\+F\+F\+E\+R\+\_\+\+H\+E\+A\+D\+E\+R\+\_\+T}} $\ast$$\ast$buffer, uint32\+\_\+t flags)
\item 
\mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_gae5b613de80c81e4f71c93b8d8ec9ba6a}{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+full}} (\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$port, \mbox{\hyperlink{struct_m_m_a_l___b_u_f_f_e_r___h_e_a_d_e_r___t}{M\+M\+A\+L\+\_\+\+B\+U\+F\+F\+E\+R\+\_\+\+H\+E\+A\+D\+E\+R\+\_\+T}} $\ast$$\ast$buffer, uint32\+\_\+t flags)
\item 
\mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_ga858aa25a3793d4c6eff90a160ae25c24}{mmal\+\_\+wrapper\+\_\+cancel}} (\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$wrapper)
\item 
\mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} \mbox{\hyperlink{group___mmal_component_wrapper_gaab5fe37ed731136e0dae9caaa4ad9c17}{mmal\+\_\+wrapper\+\_\+destroy}} (\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$wrapper)
\end{DoxyCompactItemize}
\subsection*{M\+M\+AL wrapper flags}
\label{_amgrp228ac8a7ba0bb8890b3e9b446f3c15f6}%
\label{group___mmal_component_wrapper_wrapperflags}%
\Hypertarget{group___mmal_component_wrapper_wrapperflags}%
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___mmal_component_wrapper_gabcf880bf771680b5b869ee42472389ea}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT}}~1
\item 
\#define \mbox{\hyperlink{group___mmal_component_wrapper_gaad60b4391e0e0c58e59327ad1899ff9b}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+A\+L\+L\+O\+C\+A\+TE}}~2
\item 
\#define \mbox{\hyperlink{group___mmal_component_wrapper_gae0554163653545fb51c4daf5fc32fd25}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+U\+S\+E\+\_\+\+S\+H\+A\+R\+E\+D\+\_\+\+M\+E\+M\+O\+RY}}~4
\end{DoxyCompactItemize}


\subsection{Detailed Description}
The component wrapper utility functions can be used in place of common sequences of calls to the M\+M\+AL A\+PI in order to control a standalone component. It hides some of the complexity in using standalone components behind a fully synchronous interface. 

\subsection{Macro Definition Documentation}
\mbox{\Hypertarget{group___mmal_component_wrapper_gaad60b4391e0e0c58e59327ad1899ff9b}\label{group___mmal_component_wrapper_gaad60b4391e0e0c58e59327ad1899ff9b}} 
\index{utility@{utility}!M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+A\+L\+L\+O\+C\+A\+TE@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+A\+L\+L\+O\+C\+A\+TE}}
\index{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+A\+L\+L\+O\+C\+A\+TE@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+A\+L\+L\+O\+C\+A\+TE}!utility@{utility}}
\subsubsection{\texorpdfstring{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+A\+L\+L\+O\+C\+A\+TE}{MMAL\_WRAPPER\_FLAG\_PAYLOAD\_ALLOCATE}}
{\footnotesize\ttfamily \#define M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+A\+L\+L\+O\+C\+A\+TE~2}

The pool for the port should allocate memory for the payloads \mbox{\Hypertarget{group___mmal_component_wrapper_gae0554163653545fb51c4daf5fc32fd25}\label{group___mmal_component_wrapper_gae0554163653545fb51c4daf5fc32fd25}} 
\index{utility@{utility}!M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+U\+S\+E\+\_\+\+S\+H\+A\+R\+E\+D\+\_\+\+M\+E\+M\+O\+RY@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+U\+S\+E\+\_\+\+S\+H\+A\+R\+E\+D\+\_\+\+M\+E\+M\+O\+RY}}
\index{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+U\+S\+E\+\_\+\+S\+H\+A\+R\+E\+D\+\_\+\+M\+E\+M\+O\+RY@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+U\+S\+E\+\_\+\+S\+H\+A\+R\+E\+D\+\_\+\+M\+E\+M\+O\+RY}!utility@{utility}}
\subsubsection{\texorpdfstring{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+U\+S\+E\+\_\+\+S\+H\+A\+R\+E\+D\+\_\+\+M\+E\+M\+O\+RY}{MMAL\_WRAPPER\_FLAG\_PAYLOAD\_USE\_SHARED\_MEMORY}}
{\footnotesize\ttfamily \#define M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+P\+A\+Y\+L\+O\+A\+D\+\_\+\+U\+S\+E\+\_\+\+S\+H\+A\+R\+E\+D\+\_\+\+M\+E\+M\+O\+RY~4}

The port will use shared memory payloads \mbox{\Hypertarget{group___mmal_component_wrapper_gabcf880bf771680b5b869ee42472389ea}\label{group___mmal_component_wrapper_gabcf880bf771680b5b869ee42472389ea}} 
\index{utility@{utility}!M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT}}
\index{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT}!utility@{utility}}
\subsubsection{\texorpdfstring{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT}{MMAL\_WRAPPER\_FLAG\_WAIT}}
{\footnotesize\ttfamily \#define M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT~1}

The operation should be blocking 

\subsection{Typedef Documentation}
\mbox{\Hypertarget{group___mmal_component_wrapper_gab3104be6013b2cdfadf7da4fe2affab3}\label{group___mmal_component_wrapper_gab3104be6013b2cdfadf7da4fe2affab3}} 
\index{utility@{utility}!M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+C\+A\+L\+L\+B\+A\+C\+K\+\_\+T@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+C\+A\+L\+L\+B\+A\+C\+K\+\_\+T}}
\index{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+C\+A\+L\+L\+B\+A\+C\+K\+\_\+T@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+C\+A\+L\+L\+B\+A\+C\+K\+\_\+T}!utility@{utility}}
\subsubsection{\texorpdfstring{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+C\+A\+L\+L\+B\+A\+C\+K\+\_\+T}{MMAL\_WRAPPER\_CALLBACK\_T}}
{\footnotesize\ttfamily typedef void($\ast$ M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+C\+A\+L\+L\+B\+A\+C\+K\+\_\+T) (\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$wrapper)}

Definition of the callback used by a wrapper to signal back to the client that a buffer header is available either in the pool or in the output queue.


\begin{DoxyParams}{Parameters}
{\em wrapper} & Pointer to the wrapper \\
\hline
\end{DoxyParams}
\mbox{\Hypertarget{group___mmal_component_wrapper_gad6b7cb1f4564f8951d22afbac6faae40}\label{group___mmal_component_wrapper_gad6b7cb1f4564f8951d22afbac6faae40}} 
\index{utility@{utility}!M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}}
\index{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T@{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}!utility@{utility}}
\subsubsection{\texorpdfstring{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}{MMAL\_WRAPPER\_T}}
{\footnotesize\ttfamily typedef struct \mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} \mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}}}

Forward type definition for a wrapper 

\subsection{Function Documentation}
\mbox{\Hypertarget{group___mmal_component_wrapper_ga97da12059ceca54c183c4183e1ba6534}\label{group___mmal_component_wrapper_ga97da12059ceca54c183c4183e1ba6534}} 
\index{utility@{utility}!mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+empty@{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+empty}}
\index{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+empty@{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+empty}!utility@{utility}}
\subsubsection{\texorpdfstring{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+empty()}{mmal\_wrapper\_buffer\_get\_empty()}}
{\footnotesize\ttfamily \mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+empty (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$}]{port,  }\item[{\mbox{\hyperlink{struct_m_m_a_l___b_u_f_f_e_r___h_e_a_d_e_r___t}{M\+M\+A\+L\+\_\+\+B\+U\+F\+F\+E\+R\+\_\+\+H\+E\+A\+D\+E\+R\+\_\+T}} $\ast$$\ast$}]{buffer,  }\item[{uint32\+\_\+t}]{flags }\end{DoxyParamCaption})}

Wait for an empty buffer to be available on a port.


\begin{DoxyParams}{Parameters}
{\em port} & port to get an empty buffer from \\
\hline
{\em buffer} & points to the retreived buffer on return \\
\hline
{\em flags} & specify M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT for a blocking operation \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
M\+M\+A\+L\+\_\+\+S\+U\+C\+C\+E\+SS on success. 
\end{DoxyReturn}
\mbox{\Hypertarget{group___mmal_component_wrapper_gae5b613de80c81e4f71c93b8d8ec9ba6a}\label{group___mmal_component_wrapper_gae5b613de80c81e4f71c93b8d8ec9ba6a}} 
\index{utility@{utility}!mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+full@{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+full}}
\index{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+full@{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+full}!utility@{utility}}
\subsubsection{\texorpdfstring{mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+full()}{mmal\_wrapper\_buffer\_get\_full()}}
{\footnotesize\ttfamily \mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} mmal\+\_\+wrapper\+\_\+buffer\+\_\+get\+\_\+full (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$}]{port,  }\item[{\mbox{\hyperlink{struct_m_m_a_l___b_u_f_f_e_r___h_e_a_d_e_r___t}{M\+M\+A\+L\+\_\+\+B\+U\+F\+F\+E\+R\+\_\+\+H\+E\+A\+D\+E\+R\+\_\+T}} $\ast$$\ast$}]{buffer,  }\item[{uint32\+\_\+t}]{flags }\end{DoxyParamCaption})}

Wait for a full buffer to be available on a port.


\begin{DoxyParams}{Parameters}
{\em port} & port to get a full buffer from \\
\hline
{\em buffer} & points to the retreived buffer on return \\
\hline
{\em flags} & specify M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+\+F\+L\+A\+G\+\_\+\+W\+A\+IT for a blocking operation \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
M\+M\+A\+L\+\_\+\+S\+U\+C\+C\+E\+SS on success. 
\end{DoxyReturn}
\mbox{\Hypertarget{group___mmal_component_wrapper_ga858aa25a3793d4c6eff90a160ae25c24}\label{group___mmal_component_wrapper_ga858aa25a3793d4c6eff90a160ae25c24}} 
\index{utility@{utility}!mmal\+\_\+wrapper\+\_\+cancel@{mmal\+\_\+wrapper\+\_\+cancel}}
\index{mmal\+\_\+wrapper\+\_\+cancel@{mmal\+\_\+wrapper\+\_\+cancel}!utility@{utility}}
\subsubsection{\texorpdfstring{mmal\+\_\+wrapper\+\_\+cancel()}{mmal\_wrapper\_cancel()}}
{\footnotesize\ttfamily \mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} mmal\+\_\+wrapper\+\_\+cancel (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$}]{wrapper }\end{DoxyParamCaption})}

Cancel any ongoing blocking operation on a component wrapper.


\begin{DoxyParams}{Parameters}
{\em wrapper} & The wrapper on which to cancel operations. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
M\+M\+A\+L\+\_\+\+S\+U\+C\+C\+E\+SS on success. 
\end{DoxyReturn}
\mbox{\Hypertarget{group___mmal_component_wrapper_gab454ffe44bbd981c84327a134c17b0b2}\label{group___mmal_component_wrapper_gab454ffe44bbd981c84327a134c17b0b2}} 
\index{utility@{utility}!mmal\+\_\+wrapper\+\_\+create@{mmal\+\_\+wrapper\+\_\+create}}
\index{mmal\+\_\+wrapper\+\_\+create@{mmal\+\_\+wrapper\+\_\+create}!utility@{utility}}
\subsubsection{\texorpdfstring{mmal\+\_\+wrapper\+\_\+create()}{mmal\_wrapper\_create()}}
{\footnotesize\ttfamily \mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} mmal\+\_\+wrapper\+\_\+create (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$$\ast$}]{wrapper,  }\item[{const char $\ast$}]{name }\end{DoxyParamCaption})}

Create a wrapper around a component. The wrapper shall include a pool of buffer headers for each port. The pools will be suitable for the current format of its associated port.


\begin{DoxyParams}{Parameters}
{\em wrapper} & The address of a wrapper pointer that will be set to point to the created wrapper. \\
\hline
{\em name} & The name of the component to create. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
M\+M\+A\+L\+\_\+\+S\+U\+C\+C\+E\+SS on success. 
\end{DoxyReturn}
\mbox{\Hypertarget{group___mmal_component_wrapper_gaab5fe37ed731136e0dae9caaa4ad9c17}\label{group___mmal_component_wrapper_gaab5fe37ed731136e0dae9caaa4ad9c17}} 
\index{utility@{utility}!mmal\+\_\+wrapper\+\_\+destroy@{mmal\+\_\+wrapper\+\_\+destroy}}
\index{mmal\+\_\+wrapper\+\_\+destroy@{mmal\+\_\+wrapper\+\_\+destroy}!utility@{utility}}
\subsubsection{\texorpdfstring{mmal\+\_\+wrapper\+\_\+destroy()}{mmal\_wrapper\_destroy()}}
{\footnotesize\ttfamily \mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} mmal\+\_\+wrapper\+\_\+destroy (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{struct_m_m_a_l___w_r_a_p_p_e_r___t}{M\+M\+A\+L\+\_\+\+W\+R\+A\+P\+P\+E\+R\+\_\+T}} $\ast$}]{wrapper }\end{DoxyParamCaption})}

Destroy a wrapper. Destroys a component wrapper and any resources it owns.


\begin{DoxyParams}{Parameters}
{\em wrapper} & The wrapper to be destroyed. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
M\+M\+A\+L\+\_\+\+S\+U\+C\+C\+E\+SS on success. 
\end{DoxyReturn}
\mbox{\Hypertarget{group___mmal_component_wrapper_ga5b03d5dd0a18cd4cd6142517156a2887}\label{group___mmal_component_wrapper_ga5b03d5dd0a18cd4cd6142517156a2887}} 
\index{utility@{utility}!mmal\+\_\+wrapper\+\_\+port\+\_\+disable@{mmal\+\_\+wrapper\+\_\+port\+\_\+disable}}
\index{mmal\+\_\+wrapper\+\_\+port\+\_\+disable@{mmal\+\_\+wrapper\+\_\+port\+\_\+disable}!utility@{utility}}
\subsubsection{\texorpdfstring{mmal\+\_\+wrapper\+\_\+port\+\_\+disable()}{mmal\_wrapper\_port\_disable()}}
{\footnotesize\ttfamily \mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} mmal\+\_\+wrapper\+\_\+port\+\_\+disable (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$}]{port }\end{DoxyParamCaption})}

Disable a port on a component wrapper.


\begin{DoxyParams}{Parameters}
{\em port} & port to disable \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
M\+M\+A\+L\+\_\+\+S\+U\+C\+C\+E\+SS on success. 
\end{DoxyReturn}
\mbox{\Hypertarget{group___mmal_component_wrapper_ga1eea5ae6cdbb178ae318700919e59c5a}\label{group___mmal_component_wrapper_ga1eea5ae6cdbb178ae318700919e59c5a}} 
\index{utility@{utility}!mmal\+\_\+wrapper\+\_\+port\+\_\+enable@{mmal\+\_\+wrapper\+\_\+port\+\_\+enable}}
\index{mmal\+\_\+wrapper\+\_\+port\+\_\+enable@{mmal\+\_\+wrapper\+\_\+port\+\_\+enable}!utility@{utility}}
\subsubsection{\texorpdfstring{mmal\+\_\+wrapper\+\_\+port\+\_\+enable()}{mmal\_wrapper\_port\_enable()}}
{\footnotesize\ttfamily \mbox{\hyperlink{group___mmal_types_ga5ac87230bd615d2b154a9d5899bc37fd}{M\+M\+A\+L\+\_\+\+S\+T\+A\+T\+U\+S\+\_\+T}} mmal\+\_\+wrapper\+\_\+port\+\_\+enable (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{struct_m_m_a_l___p_o_r_t___t}{M\+M\+A\+L\+\_\+\+P\+O\+R\+T\+\_\+T}} $\ast$}]{port,  }\item[{uint32\+\_\+t}]{flags }\end{DoxyParamCaption})}

Enable a port on a component wrapper.


\begin{DoxyParams}{Parameters}
{\em port} & port to enable \\
\hline
{\em flags} & used to specify payload allocation flags for the pool \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
M\+M\+A\+L\+\_\+\+S\+U\+C\+C\+E\+SS on success. 
\end{DoxyReturn}
